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Application of hast in evaluation of plastic encapsulated microcircuits

Application of hast in evaluation of plastic encapsulated microcircuits

introduction
Plastic encapsulated microcircuit (PEM) is widely used in commercial and industrial fields because of its small size, light weight and low cost. In recent years, with the continuous improvement of plastic packaging materials and processes, the adaptability and reliability of domestic PEM to humid and hot environment have been greatly improved, which has promoted the application of PEM in domestic aviation, aerospace, national defense and other highly reliable fields.
In order to quickly evaluate the adaptability and reliability of PEM in humid and hot environment, high accelerated temperature and humidity stress test (HAST) (JEDEC jesd22-a110e-2015), mechanical and climatic test methods for semiconductor devices Part 4: strongly accelerated steady state humid and heat test (HAST) (IEC 60749-4-2017) The mechanical and climatic test methods for semiconductor devices Part 4: strongly accelerated steady state damp heat test (HAST) (gb/t 4937.4-2012) and other standards provide a high accelerated stress test (HAST) method, which can quickly evaluate the reliability of PEM in damp heat environment by applying comprehensive temperature humidity electrical stress.
1、 Hast model
Based on the failure mode and failure mechanism, and the electric stress under the condition of power on bias, the Hallberg peck model and the stress related to damp heat test are studied Chemical reaction corrosion effect, establish temperature humidity Electric comprehensive stress model and simplified calculation formula of acceleration factor:

Where:
AR is the acceleration factor;
RH refers to the molded circuit chip in the service environment
Relative humidity of the surface;
Rhy is the relative humidity of the surface of the plastic encapsulated circuit chip under the test environment;
E is the activation energy, and the value range is 0.79e~ 0.90e V;
K is the Boltzmann constant, k=8.62x10'e v/k;
Ty is the chip junction temperature under the operating environment;
T is the chip junction temperature under the test environment;
U is the applied bias voltage;
UN is the nominal value of the supply voltage.
2、 Temperature and humidity of hast
At present, the relevant standards and temperature and humidity test conditions for PEM hast in automotive, aviation, aerospace, national defense and other highly reliable application fields are shown in Table 1. Military standards have higher requirements for adaptability and reliability to harsh environments than civil standards. Under the same test temperature and test humidity, military standards have longer requirements for damp heat test time and higher test severity. The test time specified in the hast American standard is 500 h, while that specified in the civil aviation, aerospace and automotive standards is 96h.

3、 Bias voltage of hast
Ast needs to apply bias voltage, and the application of bias voltage needs to follow the following five criteria:
(1) Minimum power dissipation;
(2) Apply lead out offset alternately as much as possible;
(3) The voltage difference between adjacent metallization lines on the chip shall be as high as possible;
(4) Maximum voltage in the operating range;
(5) Either continuous or cyclic offset is adopted to meet the requirement The above criteria shall be the one with higher severity. This standard
The preferred selection shall be based on the device structure and specific performance.
Continuous bias voltage application: continuously apply DC bias. When the chip temperature is less than 10 ℃ higher than the ambient temperature of the test chamber or the heat dissipation of the DUT is less than 200MW and the chip temperature is unknown, the continuous bias is more severe than the cyclic bias. If the thermal dissipation of the DUT exceeds 200 MW, the chip temperature shall be calculated. If the chip temperature exceeds the ambient temperature of the test chamber by 5 ℃ or more, the difference between the chip temperature and the test ambient temperature shall be recorded in the test results, and the accelerated failure mechanism will be affected.
Cyclic bias voltage application: the application of DC voltage is interrupted periodically according to the appropriate frequency and duty cycle. If the bias condition causes the chip temperature to be higher than the test chamber temperature, and the difference △ TJA exceeds 10 ℃, and it is the best bias condition for a specific device type, the cyclic bias will be stricter than the continuous bias. The heat generated by power dissipation dissipates the moisture on and around the chip surface related to the failure mechanism. During shutdown, when the device has no power dissipation, the moisture collects in the chip. For most PEMs, the DUT shall be cycled with a 50% duty cycle. For devices with package thickness greater than or equal to 2mm, the cycle voltage application time shall be less than or equal to 2h, and for devices with package thickness less than 2mm, the cycle voltage application time shall be ≤ 30min. When the chip temperature calculated based on the known thermal resistance and dissipation exceeds the ambient temperature of the test chamber by 5 ℃ or more, the chip temperature shall be recorded in the test results.
4、 Main failure modes and failure mechanisms
PEM is a non airtight package. Moisture can penetrate into the package through the epoxy resin itself and the gap between the resin and the lead frame, which is easy to cause delamination cracking and interface delamination between the plastic packaging material and the lead frame. At the same time, impurity ions (such as na+, k+, cl+) in the resin will form a layer of corrosive hydrated oxide on the passivation layer of the interface surface, causing corrosion of the chip surface, lead frame and bonding point, Finally, it will lead to device performance degradation or function failure such as short circuit and open circuit. There are three conditions to produce electromigration effect in the plastic packaging device: moisture absorption and condensation; There is an electric field generated by internal voltage; Internal pollutants exist, such as na+, cl+ or p+. Table 2 shows the effect of different stress of hast on the failure mode and failure mechanism of plastic encapsulated integrated circuits.

5、 Conclusion
By studying PEM hast method, the following conclusions are drawn:
(1) The hast test is affected by temperature humidity and electrical stress, and the acceleration factor obeys the exponential function. Compared with the traditional steady-state damp heat test method, the hast test can greatly shorten the test time;
(2) The military standard and the civil standard have the same hast method, but in terms of test time, the military standard is 2 to 5 times stricter than the civil standard;
(3) Hast mainly induces delamination and cracking of PEM packaging materials and corrosion of core, chip surface, frame or bonding point, which will lead to device parameter drift, short circuit and open circuit failure.